1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device having a wiring, where a plurality of conductive layers are stacked, and to a method for manufacturing a semiconductor device having a wiring, where a plurality of conductive layers is each formed of a different material. In particular, the present invention relates to a method for manufacturing a semiconductor device having a wiring where a conductive layer containing aluminum (Al) as the main component is stacked over a conductive layer containing molybdenum (Mo) as the main component.
2. Description of the Related Art
A method for manufacturing a wiring by stacking a plurality of conductive layers over an insulating surface and etching the stack is suggested (see Reference 1: Japanese Patent Application Laid-Open No. H07-169837).
The method for manufacturing a wiring mentioned in Reference 1 is explained with reference to FIGS. 6A to 6C. A first conductive layer 601 and a second conductive layer 602 over the first conductive layer 601 are formed over an insulating surface 600. A resist mask 603 is formed over the second conductive layer 602 (FIG. 6A). With the use of the mask 603, the second conductive layer 602 is dry-etched until the surface of the first conductive layer 601 is exposed to form a second conductive layer 612 processed into an arbitrary shape (FIG. 6B). The first conductive layer 601 is wet-etched with the mask left to form a first conductive layer 611. In such a manner, a wiring with the stack of the first conductive layer 611 and the second conductive layer 612 are formed (FIG. 6C).
In the method for manufacturing a wiring mentioned in Reference 1, the etching rate of the second conductive layer 612 is set extremely lower than that of the first conductive layer 601 in the wet etching for processing the first conductive layer 601. In such a manner, the second conductive layer 612 that is already processed into an arbitrary shape is made be hardly etched in the wet etching.
In the method for manufacturing a wiring mentioned in Reference 1, the etching rate of the second conductive layer 612 is set lower than that of the first conductive layer 601 in the wet etching. Therefore, in the wet etching, the first conductive layer 611 is at risk of being hollowed by having the end of the second conductive layer 612 etched even on the inner side or at risk of the wiring with the stack of the first conductive layer 611 and the second conductive layer 612 having a reverse-tapered shape (see FIG. 6C). When a film is formed over the wiring formed in such a manner, failure such as the discontinuity of the film occurs.